[IA64] Use original itir when inserting into the single-entry TLB

[IA64] Use original itir when inserting into the single-entry TLB

http://lists.xensource.com/archives/html/xen-ia64-devel/2006-11/msg00349.html

The real VHPT insertion is done based on the machine PTE returned from
translate_domain_pte, which does the appropriate offset calculations.

However, the insertion into the one-entry TLB uses the original PTE, but
the page size has been reset to PAGE_SIZE [1].  Thus the entry in the
one-entry TLB incorrectly maps the PAGE_SIZE sub-page which was faulted
on to the PAGE_SIZE sub-page at the bottom of the superpage.

I think it makes most sense to simply use the original itir when
inserting into the single-entry TLB, as per attached patch.  I've moved
the vcpu_set_tr_entry calls up a level into vcpu_itc_d and vcpu_itc_i;
the third caller previously used the 4 flag to specify "don't do that".

[1] In fact, this is enforced twice, once in translate_domain_pte and
again in vcpu_itc_no_srlz.

Signed-off-by: Matthew Chapman <matthewc@cse.unsw.edu.au>
Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>